1. Field of the Invention
Embodiments of the invention generally relate to a plating cell having a deplating electrode positioned radially outward of a plating electrode.
2. Description of the Related Art
Metallization of sub-quarter micron sized features is a foundational technology for present and future generations of integrated circuit manufacturing processes. More particularly, in devices such as ultra large scale integration-type devices, i.e., devices having integrated circuits with more than a million logic gates, the multilevel interconnects that lie at the heart of these devices are generally formed by filling high aspect ratio, i.e., greater than about 4:1, interconnect features with a conductive material, such as copper or aluminum. Conventionally, deposition techniques such as chemical vapor deposition (CVD) and physical vapor deposition (PVD) have been used to fill these interconnect features. However, as the interconnect sizes decrease and aspect ratios increase, void-free interconnect feature fill via conventional metallization techniques becomes increasingly difficult. Therefore, plating techniques, i.e., electrochemical plating (ECP) and electroless plating, have emerged as promising processes for void free filling of such features.
In an ECP process, for example, sub-quarter micron sized high aspect ratio features formed into the surface of a substrate (or a layer deposited thereon) may be efficiently filled with a conductive material, such as copper. ECP plating processes are generally two stage processes, wherein a seed layer is first formed over the surface features of the substrate, and then the surface features of the substrate are exposed to an electrolyte solution, while an electrical bias is applied between the seed layer and a copper anode positioned within the electrolyte solution. The electrolyte solution generally contains ions to be plated onto the surface of the substrate, and therefore, the application of the electrical bias causes these ions to be urged out of the electrolyte solution and to be plated onto the biased seed layer.
Conventional electrochemical plating cells generally utilize soluble anodes, e.g., a copper anode in a copper plating system. Soluble anodes generally operate as both an anodic electrode, as well as a source of replenishment for the copper ions. However, the use of soluble anodes presents several challenges. For example, additives in the plating solution, i.e., levelers, suppressors, accelerators, etc., are known to react or break down when they contact the anode. Additionally, soluble anodes are prone to developing layers of material on the surface thereof during plating operations, which has a detrimental effect upon plating uniformity. Further, conventional plating cells also face challenges related to copper from the plating solution plating onto the electrical contacts (cathode electrodes) that are used to electrically contact the substrate during plating operations. When the copper plates on these contacts, the electrical resistance and/or the shape of the contacts may be changed, which also has a negative effect upon plating uniformity.
Therefore, there is a need for a plating cell configured to minimize additive breakdown at the anode via use of an insoluble anode, while also providing for a way to remove the copper that accumulates on the substrate contact pins.